Analysis of Packet-Switched Multiple-Bus Multiprocessor Systems

Document Type

Article

Date of Original Version

1-1-1991

Abstract

This correspondence presents performance analyses of packet-switched multiple-bus multiprocessor systems. Approximate queueing network models are developed for both synchronous and asynchronous control schemes and the results are shown to be in good agreement with our simulation results. The analysis of the synchronous system is based on a decomposition technique with each of the shared resources in the system being represented as single server queue. For asynchronous systems, the analysis is based on flow equivalence technique. Numerical results obtained from our analyses indicate that packet-switched multiple-bus multiprocessors with only a few buses perform close to the crossbar-based multiprocessors. © 1991 IEEE

Publication Title, e.g., Journal

IEEE Transactions on Computers

Volume

40

Issue

3

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