An indirect current sensing technique for IDDQ and IDDT tests
Document Type
Conference Proceeding
Date of Original Version
1-1-2006
Abstract
An indirect current sensing technique for IDDQ and I DDT tests is proposed in this paper. This is accomplished by utilizing the pervasive on-chip voltage regulators and thus have little or no impact on CUT's design and its performance. We demonstrate that the proposed technique can be applied to both IDDQ and IDDT tests. Experiments were successfully conducted in SPICE simulations assuming the TSMC 0.18μm CMOS technology. Copyright 2006 ACM.
Publication Title, e.g., Journal
Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI
Volume
2006
Citation/Publisher Attribution
Chen, Chuen Song, Jien Chung Lo, and Tian Xia. "An indirect current sensing technique for IDDQ and IDDT tests." Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI 2006, (2006): 235-240. doi: 10.1145/1127908.1127964.