Title
HAVENN: horizontally and vertically expandable neural networks
Document Type
Conference Proceeding
Date of Original Version
12-1-1994
Abstract
The toughest challenge facing hardware designers of artificial neural networks is the expandability problem, since no single VLSI chip is likely to accommodate all components of a real world application. In this paper, we present a microelectronic system architecture with virtually unlimited expandability at a relatively low cost in additional hardware and reduced system performance. The Horizontally And Vertically Expandable Neural Network (HAVENN) architecture consists of three types of chips: a single layer neural network chip, a summer chip and a repeater chip. The most important features of the proposed architecture are: a balanced distribution of (circuit) complexity between board level and chip level, easy implementation, true parallel operation and versatility.
Publication Title, e.g., Journal
IEEE International Conference on Neural Networks - Conference Proceedings
Volume
4
Citation/Publisher Attribution
Lo, Jien-Chung, and G. Fischer. "HAVENN: horizontally and vertically expandable neural networks." IEEE International Conference on Neural Networks - Conference Proceedings 4, (1994): 2074-2077. https://digitalcommons.uri.edu/ele_facpubs/239