Improved null cancellation in a 6TH-order Σ-Δ modulator realized with two 3RD-order sections

Document Type

Conference Proceeding

Date of Original Version

1-1-2002

Abstract

This paper presents an improved method to digitally eorreet for static, analog circuit imperfections in a two-stage, (i " order, cascaded (6-3) sigma-delta modulator. Bv adding a digital correction term to the output of the digital noise cancellation filter, the first stage parasitic quantization noise due to finite amplifier gain and C-Ratio mismatches can be completely removed. A (>-3 modulator implemented as a fully differential switchcd-capacitor circuit , designed for an OSR of 16. has been fabricated in a 1.2 μm double-poly n- well CMOS process. Improvements have been made in t he null cancellation leading to approximately a 10 (IB increase in SNDR over a range of signal amplitudes from 12 μVolts to 500 niY. A peak SNDR/SFDR of 87/100 (IB for a 1 MHz sample rate and 84/93 (IB for a 2.5 Mlfz sample rate have been achieved.

Publication Title, e.g., Journal

4th IMEKO TC4 Conference on Advanced A/D and D/A Conversion Techniques and Their Applications and the 7th Workshop on ADC Modelling and Testing 2002

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