A custom chip set for a frequency-agile high-resolution sonar array
Document Type
Article
Date of Original Version
1-1-2007
Abstract
This paper describes two custom-integrated circuits, which form the core building blocks of a versatile wideband sonar array. An analog 0.5-μm complementary metal-oxide-semiconductor (CMOS) chip houses a preamplifier, an antialias filter, and a high-resolution (14-16 b) data converter based on delta-sigma modulation techniques. A complementary 0.35-μm digital CMOS chip incorporates a four-stage multirate filter cascade, which provides a wideband and two narrowband outputs. The complex narrowband outputs are obtained via a subsampling mixer and span over the top 15% or the top 10%, respectively, of the original band. The system sampling clock can vary from 2 to 10 MHz to enable tuning to a specific frequency window located anywhere between 30 and 150 kHz. Both chips process four sonar channels in parallel and, when clocked at 10 MHz, dissipate a combined power of 416 mW (104 mW per channel). © 2007 IEEE.
Publication Title, e.g., Journal
IEEE Journal of Oceanic Engineering
Volume
32
Issue
2
Citation/Publisher Attribution
Fischer, Godi, Alan J. Davis, and Prasan Kasturi. "A custom chip set for a frequency-agile high-resolution sonar array." IEEE Journal of Oceanic Engineering 32, 2 (2007): 416-427. doi: 10.1109/JOE.2006.880981.
