Design of static CMOS self-checking circuits using built-in current sensing

Authors

J.-C. Lo, University of Rhode IslandFollow
J. C. Daly, University of Rhode IslandFollow
M. Nicolaidis, Institut polytechnique de Grenoble

Document Type

Conference Proceeding

Date of Original Version

1-1-1992

Abstract

The authors present a novel scheme for implementing self-checking circuits in static CMOS. A strongly code disjoint (SCD) built-in current sensor (BICS) is presented. It is used to cover faults whose detection cannot be guaranteed by logic monitoring. A previously fabricated and tested high-speed BICS is examined for its behavior in the presence of faults. Then, a self-exercising mechanism is designed to obtain the SCD property. The integration of this SCD BICS with a self-checking circuit achieves the well-known goal of total self-checking.

Publication Title, e.g., Journal

FTCS 1992 - 22nd Annual International Symposium on Fault-Tolerant Computing

Citation/Publisher Attribution

Lo, J.-C., J. C. Daly, and M. Nicolaidis. "Design of static CMOS self-checking circuits using built-in current sensing." FTCS 1992 - 22nd Annual International Symposium on Fault-Tolerant Computing (1992): 104-111. doi: 10.1109/FTCS.1992.243610.