Date of Award
2004
Degree Type
Thesis
Degree Name
Master of Science in Electrical Engineering (MSEE)
Department
Electrical and Computer Engineering
First Advisor
Godi Fischer
Abstract
The topic of this thesis is to design and implement a low voltage, high speed, 10-bit Digital to Analog Converter in 0.5 μm CMOS technology. Design, architecture, methodology, and performance of the proposed DAC are presented.
CMOS Current Steering DACs are inherently fast and thus represent a good choice if high speed is important. To reduce the linear graded mismatch the positioning of current sources was carefully studied. Different architectures are outlined and segmented architecture has been implemented due to its suitableness for high speed applications. Two sets of DACs with different types of current sources have been fabricated and the performance was verified.
Recommended Citation
Peddinti, Vijay Kumar, "DESIGN AND IMPLEMENTATION OF A LOW VOLTAGE, HIGH SPEED 10-BIT CMOS CURRENT MODE DAC" (2004). Open Access Master's Theses. Paper 2677.
https://digitalcommons.uri.edu/theses/2677