Date of Award

1-1-2022

Degree Type

Thesis

Degree Name

Master of Science in Computer Science

Department

Computer Science and Statistics

First Advisor

Marco Alvarez

Abstract

Accelerators such as graphics processing units (GPUs) and tensor processingunits (TPUs) are becoming increasingly common in modern computing systems. The addition of these devices introduces Heterogeneous Device Mapping (HDM), a challenging real world task in which a function maps an input program to its optimal device. This task is of particular interest to researchers, as solving it requires identifying characteristics of code correlated with performance on these heterogeneous devices. Deep Learning based approaches have emerged as the dominant performers in this task, as they can automatically derive and utilize these characteristics when trained using supervised learning. Of particular interest to researchers is what representation method to use for code. Compiler-based graph representations have dominated performance metrics in this task, and researchers are increasingly trying to boost expressiveness of these representations in hope of yielding better performance. These more expressive representations can become quite bloated, creating graphs that are over 1000 nodes. This increases computational complexity, infer- ence time, as well as the difficulty in learning as there is simply more information present. To address these issues, this thesis introduces MemorySSA Enhanced Control Flow Graphs (MCFGs), which are on par with or exceed performance of previous static compiler-based graph representations, and have an average node count of approximately 100x less than the state of the art ProGraML.

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