Date of Award


Degree Type


Degree Name

Doctor of Philosophy in Electrical Engineering


Computer Engineering


Electrical, Computer, and Biomedical Engineering

First Advisor

Resit Sendag


Current processors employ aggressive prediction mechanisms to improve performance and reduce power. Most optimizations, however, are as a result of fairly ad-hoc observations or they primarily rely on heuristic. It is increasingly important to understand and quantify a program's dynamic behavior to effectively design next-generation prediction mechanisms. Although quantifying frequent behavior in an application's dynamic execution behavior is trivial in cases such as observing the frequency of each type of instruction, it is very challenging to summarize dynamic data reference behavior. As a result, most prediction mechanisms (data prefetchers, branch predictors, and other) employed in current processors today rely on heuristic-based analysis or ad-hoc observations. After some patterns are observed, a hardware decision is made and the design space of the predictor or multiple predictors is explored through simulation to determine the best performing predictor and its configuration. However, because the design is targeted for observed and/or anticipated patterns, some dynamic behavior is not captured and remains undetected.

In this study, Idesigned and implemented two comprehensive analysis tools to quantify dynamic program behavior in terms of regularities and exact patterns. My specific emphasis in developing these tools has been on processor design and computer architecture although the tools are sufficiently general to also be used by others in software development and security.

My PatternFinder tool integrates algorithms and mechanisms inspired by DNA discovery tools. I developed three flavors of this tool that required different implementations due to specific optimizations for faster speed and smaller space. The first implementation targets the analysis of branch outcome patterns, which are sequences of 1s (ones) and 0s (zeros). The second implementation is a generalized version that allows 64-bit integers instead of 1-bit values as in the first implementation and thereby can be used to evaluate address and instruction patterns. Finally, the third implementation extends the second implementation to find patterns common to different input sequences.

My automatic source code analysis tool maps instructions to their corresponding data structuresat run-time without the need to analyze the program source code by hand. This tool is linked to the PatternFinder in that when specific instruction or data structure access patterns are targeted, automatic source-code analysis tool generates necessary input trace for the PatternFinder tool. Together the two tools that I develop can quantify pattern behavior in programs' dynamic execution.

Finally, I have demonstrated the use of the abovementioned two tools in summarizing branch and address patterns, and to identify the data structures that causes branch mispredictions for a set of program traces and SPEC CPU 2006 benchmarks.



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