Highly reliable systems with differential built-in current sensors

Document Type

Conference Proceeding

Date of Original Version



A duplicated system with a differential built-in current sensor (DBICS) method is proposed in this paper as an alternative to the classical TMR designs. The DBICS compares the IDDQ levels of the two copies from a duplicated system and then selects the correct output. Unlike the previously known duplicated-with-self-checking scheme, the proposed method is easy to design and to implement. Further, the system block can be either combinational or sequential circuits and whose size is limited only by the capability of the BICS. The extremely low redundancy level of the proposed method, ≈1% or less, enables a very high reliability performance, more than any existing technique. As the failure rates of modern submicron and deep sub-micron VLSI chips are increasing, the proposed technique will allow the use of modern high-performance chips in highly critical applications.

Publication Title, e.g., Journal

Proceedings - 1998 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, DFT 1998