Design of high-order single-bit sigma-delta modulators

Document Type

Conference Proceeding

Date of Original Version

12-1-1994

Abstract

This paper describes a design procedure for high-order (e.g. 2 ≥ n ≤ 10) single-bit sigma-delta modulators. A crucial design tool for these high-order loops is a numerical simulator which enables optimum scaling, stability testing under various operating conditions, determination of the maximum applicable input swing and the computation of the dynamic range and the signal-to-noise ratio. Numerical examples for various loop orders are given and silicon prototype circuits are presented.

Publication Title, e.g., Journal

Midwest Symposium on Circuits and Systems

Volume

2

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