VLSI implementation of a wide-band sonar receiver
Date of Original Version
This paper addresses the design and the implementation of the front-end electronics for a multi-channel sonar receiver. Each channel consists of a pre-amplifier, a fourth-order anti-alias filter and a fifth-order delta-sigma modulator. Apart form the typical complex (I&Q) narrow-band outputs, the receiver can also provide wide-band output signals of correspondingly lower resolution (e.g. 14 bits instead of 16 bits). A four-channel prototype chip has been realized using a 1.2 μm double-poly CMOS process. A single receiver channel occupies less than 1 mm2 of silicon and dissipates not more than 50 mW of power.
Proceedings - IEEE International Symposium on Circuits and Systems
Fischer, Godi, and Alan J. Davis. "VLSI implementation of a wide-band sonar receiver." Proceedings - IEEE International Symposium on Circuits and Systems 5, (2000). https://digitalcommons.uri.edu/ele_facpubs/230