Correction to “A Fast Binary Adder With Conditional Carry Generation”. (Ieee transactions on computers (1997) 46(2) (248–253) (10.1109/12.565614))

Document Type

Article

Date of Original Version

1-1-1998

Abstract

In Fig. 3 of [1], some carry outputs have been labeled with incorrect polarity. Fig. 1 below shows the updated design. The author would like to thank Khalil Habash and Chien-In Henry Chen of Wright State University for bringing this to his attention. © 1998, IEEE

Publication Title, e.g., Journal

IEEE Transactions on Computers

Volume

47

Issue

12

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