Performance of multiple-bus interconnections for multiprocessors

Document Type

Article

Date of Original Version

1-1-1990

Abstract

Bus structures, in general, are easily understood and therefore preferred by manufactures for implementation. Multiple-bus systems can be viewed as an incremental expansion of single-bus architectures that can provide high bandwidth and reliability. This research note provides a brief overview of various analytical techniques suitable for performance evaluation of the multiple-bus multiprocessors. Some results and comparisons based on these techniques are also provided. © 1990.

Publication Title, e.g., Journal

Journal of Parallel and Distributed Computing

Volume

8

Issue

3

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