Correction to “A Fast Binary Adder With Conditional Carry Generation”. (Ieee transactions on computers (1997) 46(2) (248–253) (10.1109/12.565614))

Jien Chung Lo, University of Rhode Island


In Fig. 3 of [1], some carry outputs have been labeled with incorrect polarity. Fig. 1 below shows the updated design. The author would like to thank Khalil Habash and Chien-In Henry Chen of Wright State University for bringing this to his attention. © 1998, IEEE