Title

nMOS Multiplexer for Fiber Optics

Document Type

Article

Date of Original Version

1-1-1985

Abstract

The design, layout, and testing of a 5-Mbit/s digital multi-plexer using 2- µm design rules for fiber-optic applications are described. Using a common 10-bit bus, the chip reads data from 16 sources in response to a DATA READY signal. Serial output includes a parity bit and is sent to an LED driver. Handshaking, sequential control, parity checking, and data formatting are covered. Copyright © 1985 by The Institute of Electrical and Electronics Engineers, Inc.

Publication Title

IEEE Journal of Solid-State Circuits

Volume

20

Issue

2

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