nMOS Multiplexer for Fiber Optics
Date of Original Version
The design, layout, and testing of a 5-Mbit/s digital multi-plexer using 2- µm design rules for fiber-optic applications are described. Using a common 10-bit bus, the chip reads data from 16 sources in response to a DATA READY signal. Serial output includes a parity bit and is sent to an LED driver. Handshaking, sequential control, parity checking, and data formatting are covered. Copyright © 1985 by The Institute of Electrical and Electronics Engineers, Inc.
Publication Title, e.g., Journal
IEEE Journal of Solid-State Circuits
Jeung, Yeun C., and James C. Daly. "nMOS Multiplexer for Fiber Optics." IEEE Journal of Solid-State Circuits 20, 2 (1985): 596-597. doi: 10.1109/JSSC.1985.1052351.