Title

A reconfigurable multiclass support vector machine architecture for real-time embedded systems classification

Document Type

Conference Proceeding

Date of Original Version

1-1-2015

Abstract

A great architectural challenge facing many of today's embedded systems is in combining physical sensory inputs with often power constrained computational elements to timely and accurately achieve an understanding of the current operating environment. Classification processing is one manner in which some designs accomplish this task. Support Vector Machines (SVMs) encompass one field of classification that has proven to yield high accuracy and has recently seen increased widespread use, however, the required computational intensity places a challenge on computer architects to design a hardware structure capable of performing real-time classifications while maintaining low power consumption. This paper proposes the first ever fully pipelined, floating point based, multi-use reconfigurable hardware architecture designed to act in conjunction with embedded processing as an accelerator for multiclass SVM classification. Several tasks, involving an extensive sample set of over 100,000 classifications, are evaluated for speed and accuracy against the same suite running on both an Intel Core i7-2600 system with lib SVM and an Nvidia GT 750M graphics card GPU. Our promising results show that our architecture is able to achieve a measure able speed increase in performance of up to 53x while matching 99.95% of all lib SVM predictions.

Publication Title

Proceedings - 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2015

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