Limit cycles in single-stage delta-sigma modulators

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This paper addresses the tonal behavior of single-stage high-order delta-sigma modulators. Tones are caused whenever the modulator output sequence falls into a cyclic mode. The specific cyclic pattern (or limit cycle) depends on the modulator (dc) input signal and the initial conditions of the integrator outputs. Provided the periodic sequence is sufficiently long, i.e., longer than twice the modulator oversampling ratio, it can generate frequency components, which lie in the signal passband. This results in additional system noise. By using state-space notation, we show how these limit cycles do occur. An interesting result of our investigation is that short period cycles are more likely to persevere in a noisy environment than long period ones. Practical circuits are thus likely to exhibit less passband tones than idealized systems.

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Proceedings - IEEE International Symposium on Circuits and Systems



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