An FPGA-based platform for testing and analysis of microprocessor architectural techniques: Design, implementation, and use
This thesis covers the design and FPGA-based prototyping of a full-featured microprocessor platform for use in computer architecture research studies. Existing platforms for performing studies include software simulators and hardware-assisted simulators, but there are no modular full-hardware platforms designed to measure a wide range of performance metrics. Such a platform, using HDL synthesis onto an FPGA, can run orders of magnitude faster than software-based solutions at the cost of having less flexible processor configuration and implementation. This thesis presents an end-to-end solution, from bottom-level hardware design all the way to automated results collection and analysis, which can be used with inexpensive commodity hardware. Results are presented in two example studies of cache and CPU performance, which showcase the usability of the platform as well as a new cache replacement algorithm. ^
Willard G Simoneau,
"An FPGA-based platform for testing and analysis of microprocessor architectural techniques: Design, implementation, and use"
Dissertations and Master's Theses (Campus Access).